Datasheet

Section 4 Exception Handling
Rev. 2.00 Sep. 28, 2009 Page 83 of 994
REJ09B0452-0200
4.7 Stack Status after Exception Handling
Figure 4.2 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
SP CCR
Normal mode
SP
CCR*
CCR
PC
(16 bits)
Advanced mode
PC
(24 bits)
Notes: * Ignored on return.
Normal mode is not available in this LSI.
Figure 4.2 Stack Status after Exception Handling