Datasheet

Section 7 I/O Ports
Rev. 2.00 Sep. 28, 2009 Page 171 of 994
REJ09B0452-0200
(5) PB3/DCD/PWMU1B
The pin function is switched as shown below according to the combination of the register setting
of the PWMU and the PB3DDR bit.
Setting
PWMU I/O Port
Module
Name
Pin Function
PWMU1B_OE PB3DDR
PWMU PWMU1B output 1 1
I/O port PB3 output 0 1
PB3 input
(initial setting)
⎯ 0
(6) PB2/RI/PWMU0B
The pin function is switched as shown below according to the combination of the register setting
of the PWMU and the PB2DDR bit.
Setting
PWMU I/O Port
Module
Name
Pin Function
PWMU0B_OE PB2DDR
PWMU PWMU0B output 1 1
I/O port PB2 output 0 1
PB2 input
(initial setting)
⎯ 0