Datasheet

Section 12 16-Bit Duty Period Measurement Timer (TDP)
Rev. 2.00 Sep. 28, 2009 Page 331 of 994
REJ09B0452-0200
12.2 Input/Output Pins
Table 12.1 lists the pin configuration of the TDP.
Table 12.1 Pin Configuration
Channel Pin Name I/O Function
TDPCKI0
(TDPMCI0)
Input External counter clock input
Cycle measurement control input
0
TDPCYI0 Input External event input
TDPCKI1
(TDPMCI1)
Input External counter clock input
Cycle measurement control input
1
TDPCYI1 Input External event input
2 TDPCKI2
(TDPMCI2)
Input External counter clock input
Cycle measurement control input
TDPCYI2 Input External event input
12.3 Register Descriptions
The TDP has the following registers.
Table 12.2 Register Configuration
Channel Register Name Abbreviation R/W
Initial
Value
Address
Data
Bus
Width
TDP timer counter_0 TDPCNT_0 R/W H'0000 H'FB40 16
TDP pulse width upper limit register_0 TDPWDMX_0 R/W H'FFFF H'FB42 16
TDP pulse width lower limit register_0 TDPWDMN_0 R/W H'0000 H'FB44 16
TDP cycle upper limit register_0 TDPPDMX_0 R/W H'FFFF H'FB46 16
TDP cycle lower limit register_0 TDPPDMN_0 R/W H'0000 H'FB50 16
TDP input capture register_0 TDPICR_0 R H'0000 H'FB48 16
TDP input capture buffer register_0 TDPICRF_0 R H'0000 H'FB4A 16
TDP status register_0 TDPCSR_0 R/W H'00 H'FB4C 8
TDP control register1_0 TDPCR1_0 R/W H'00 H'FB4D 8
Channel 0
TDP control register2_0 TDPCR2_0 R/W H'00 H'FB4F 8
TDP interrupt enable register_0 TDPIER_0 R/W H'00 H'FB4E 8