Datasheet

Section 20 LPC Interface (LPC)
Rev. 2.00 Sep. 28, 2009 Page 624 of 994
REJ09B0452-0200
R/W
Bit Bit Name
Initial
Value
Slave Host Description
5 IRQBSY 0 R SERIRQ Busy
Indicates that the LPC interface's SERIRQ is engaged in
transfer processing.
0: SERIRQ transfer frame wait state
[Clearing conditions]
LPC hardware reset or LPC software reset
LPC hardware shutdown or LPC software shutdown
End of SERIRQ transfer frame
1: SERIRQ transfer processing in progress
[Setting condition]
Start of SERIRQ transfer frame
4 LRSTB 0 R/W LPC Software Reset Bit
Resets the LPC interface. For the scope of initialization by
an LPC reset, see section 20.4.4, LPC Interface Shutdown
Function (LPCPD).
0: Normal state
[Clearing conditions]
Writing 0
LPC hardware reset
1: LPC software reset state
[Setting condition]
Writing 1 after reading LRSTB = 0