Datasheet

Section 20 LPC Interface (LPC)
Rev. 2.00 Sep. 28, 2009 Page 638 of 994
REJ09B0452-0200
20.3.11 Bidirectional Data Registers 0 to 15 (TWR0 to TWR15)
TWR0 to TWR15 are sixteen 8-bit readable/writable registers to both the slave (this LSI) and host.
In TWR0, however, two registers (TWR0MW and TWR0SW) are allocated to the same address
for both the host and the slave addresses. TWR0MW is a write-only register for the host, and a
read-only register for the slave, while TWR0SW is a write-only register for the slave and a read-
only register for the host. When the host and slave begin a write, after the respective registers of
TWR0 have been written to, arbitration for simultaneous access is performed by checking the
status flags whether or not those writes were valid. When the host has access rights, TWR0MW is
selected in TWR0 and the state of TWR0MW is returned when the host reads TWR0SW.
Attempts by the slave to write to TWR0SW are invalid.
When the slave has access rights, TWR0SW is selected in TWR0 and the state of TWR0SW is
returned when the slave reads TWR0MW. Attempts by the host to write to TWR0MW are invalid.
For the registers selected from the host according to the I/O address, see section 20.3.7, LPC
Channel 3 Address Registers H and L (LADR3H and LADR3L).
Data transferred in an LPC I/O write cycle is written to the selected register; in an LPC I/O read
cycle, the data in the selected register is transferred to the host. The initial values of TWR0 to
TWR15 are H'00.
20.3.12 Status Registers 1 to 4 (STR1 to STR4)
STR1 to STR4 are 8-bit registers that indicate status information during LPC interface processing.
The registers selected from the host according to the I/O address are shown in the following table.
In an LPC I/O read cycle, the data in the selected register is transferred to the host.
I/O Address
Bits 15 to 4 Bit 3 Bit 2 Bit 1 Bit 0
Transfer
Cycle Host Register Selection
Bits 15 to 4 Bit 3 1 Bit1 Bit 0 I/O read STRn read
n = 1 to 4