Datasheet

Section 21 FSI Interface
Rev. 2.00 Sep. 28, 2009 Page 697 of 994
REJ09B0452-0200
R/W
Bit Bit Name
Initial
Value
EC Host Description
5 FSIDMYE 0 R/W R FSI Dummy Enable
0: Disables FSI dummy.
1: Enables FSI dummy.
4 FSIWBUSY 0 R/W* R FSI Write Busy Flag
0: FSI write transfer is completed.
[Clearing condition]
• When this bit is read as 1 and then written with 0.
1: FSI write in transferring
[Setting condition]
• SPI flash memory write is received when
FLDCT=0.
3 FSIWI 0 R/W* R FSI Write Interrupt Flag
0: FSI write interrupt is completed.
[Clearing condition]
• Read FSIWI=1 and then write 0.
1: FSI write interrupt is in progress.
[Setting condition]
• SPI flash memory write is received when
FLDCT=0.
2 FLBUSY 0 R R LPC-SPI Direct Transfer Busy Flag
Indicates an LPC-SPI direct transfer status.
0: Direct transfer is completed.
1: During direct transfer
1, 0 ⎯ All 0 R/W R Reserved
The initial value should not be modified.
Note: * Only 0 can be written to clear the flag.