Datasheet

Section 21 FSI Interface
Rev. 2.00 Sep. 28, 2009 Page 699 of 994
REJ09B0452-0200
21.3.16 FSI General-Purpose Registers 1 to F (FSIGPR1 to FSIGPRF)
FSIGPR1 to FSIGPRF store data such as the result of FSI command interrupt processing.
• FSIGPR1 to FSIGPRF
R/W
Bit Bit Name
Initial
Value EC Host Description
7 to 0 bit 7 to bit 0 All 0 R/W R These bits store results of FSI command interrupt
processing.
21.3.17 FSI LPC Control Register (SLCR)
SLCR enables or disables the LPC host interface function of the FSI, FSI interrupt enable bit, and
FSI operation mode control bit.
R/W
Bit Bit Name
Initial
Value EC Host Description
7 FSILIE 0 R/W ⎯ FSI LPC Interface Enable
Enables or disables the LPC host interface function of
the FSI. When disabled, address-matching is not
performed and Sync is not returned.
0: Disables the LPC host interface function.
1: Enables the LPC host interface function.
6 FSICMDIE 0 R/W ⎯ FSI Command Interrupt Enable
0: Disables the FSI command interrupt.
1: Enables the FSI command interrupt.
5 FSIWIE 0 R/W ⎯ FSI Write Interrupt Enable
0: Disables the FSI write interrupt.
1: Enables the FSI write interrupt.