Datasheet

Section 21 FSI Interface
Rev. 2.00 Sep. 28, 2009 Page 723 of 994
REJ09B0452-0200
21.5 Reset Conditions
The FSI supports the LPC shut-down mode. The range of initialization in each mode is shown in
table 21.8.
Table 21.8 Range of Initialization of FSI in Each Mode
Register Name
System
Reset
LPC Reset
LPC
Shutdown
LPC Abort FSI Reset
FSIHBARH/
FSIHBARL
Bits 7 to 0 Initialized Retained Retained Retained Retained
FSISR Bits 7 to 0 Initialized Retained Retained Retained Retained
CMDHBARH/
CMDHBARL
Bits 7 to 0 Initialized Retained Retained Retained Retained
FSICMDR Bits 7 to 0 Initialized Retained Retained Retained Retained
FSILSTR1 Bits 7, 6, 4,
and 3
Initialized Initialized Retained Retained Retained
Bit 2 Initialized Initialized Retained Retained Initialized
Bits 5, 1 and
0
Initialized Retained Retained Retained Retained
FSILSTR2 Bits 7 to 5 Initialized Retained Retained Retained Retained
Bits 4 and 3 Initialized Initialized Retained Retained Initialized
Bits 2 to 0 Initialized Retained Retained Retained Retained
SPIGPR1 to
SPIGPRF
Bits 7 to 0 Initialized Retained Retained Retained Retained
SLCR Bits 7 to 0 Initialized Retained Retained Retained Retained
FSIARH/
FSIARM/
FSIARL
Bits 7 to 0 Initialized Retained Retained Retained Retained
FSIWDRHH/
FSIWDRHL/
FSIWDRLH/
FSIWDRLL
Bits 7 to 0 Initialized Retained Retained Retained Retained
LPC internal sequencer Initialized Initialized Initialized Initialized Retained