Datasheet

Section 13 8-Bit Timer (TMR)
Rev. 3.00 Sep. 28, 2009 Page 357 of 910
REJ09B0350-0300
External clock sources
Internal clock sources
TMR_X
φ, φ/2, φ/4, φ/2048, φ/4096, φ/8192
Clock X
Clock Y
Compare-match AX
Compare-match AY
Clear X
CMIAY
CMIBY
OVIY
ICIX
TMOY
TMIY (TMRIY)
TMOX
TMIX (TMRIX)
TCORA_Y
Comparator A_Y
Comparator B_Y
TCORB_Y
TCSR_Y
TCR_Y
TCORA_X
Comparator A_X
TCNT_X
Comparator B_X
Comparator C
TCORB_X
TCORC
TICRR
TICRF
TICR
TCSR_X
TCR_X
TMIY (TMCIY)
TMIX (TMCIX)
TCNT_Y
Overflow X
Overflow Y
Compare- match BX
Compare-match BY
Compare-match C
Input capture
Clock
selection
Internal bus
Control
logic
[Legend]
TCNT_X:
TCSR_X:
TCR_X:
TICR:
TCORC:
TICRR:
TICRF:
Timer counter_X
Timer control/status register_X
Timer control register_X
Input capture register
Time constant register C
Input capture register R
Input capture register F
TCORA_Y:
TCORB_Y:
TCNT_Y:
TCSR_Y:
TCR_Y:
TCORA_X:
TCORB_X:
Time constant register A_Y
Time constant register B_Y
Timer counter_Y
Timer control/status register_Y
Timer control register_Y
Time constant register A_X
Time constant register B_X
Clear Y
TMR_Y
φ/4, φ/256, φ/2048, φ/4096, φ/8192, φ/16384
Interrupt signals
+
Figure 13.2 Block Diagram of 8-Bit Timer (TMR_Y and TMR_X)