Datasheet

Section 18 Keyboard Buffer Control Unit (PS2)
Rev. 3.00 Sep. 28, 2009 Page 585 of 910
REJ09B0350-0300
Software standby mode
and watch mode
Interrupt
vector
generation
circuit
Interrupt control block
PS2KCLK
B
A
Falling edge
detection circuit
Interrupt request
to CPU
Interrupt
control
Figure 18.16 First KCLK Interrupt Path
Software standby mode
and watch mode
internal signal
KCLK
12
Interrupt internal signal
Interrupt generated
(a) Interrupt timing in software standby mode and watch mode
Software standby mode
and watch mode
internal signal
KCLK
456
Interrupt internal signal
Interrupt generated
(b) When a transition to software standby mode or watch mode is performed while the KCLI is high
Software standby mode
and watch mode
internal signal
KCLK
456
Interrupt internal signal
Interrupt generated
(c) When a transition to software standby mode or watch mode is performed while the KCLK is low
Figure 18.17 Interrupt Timing in Software Standby Mode and Watch Mode