Datasheet

Section 19 LPC Interface (LPC)
Rev. 3.00 Sep. 28, 2009 Page 597 of 910
REJ09B0350-0300
R/W
Bit Bit Name
Initial
Value
Slave Host Description
2 PMEE 0 R/W ⎯ PME Output Enable
Controls PME output in combination with the PMEB bit
in HICR1. PME pin output is open-drain, and an
external pull-up resistor (Vcc) is needed.
PMEE PMEB
0 X : PME output disabled, other function
of pin is enabled
1 0 : PME output enabled, PME pin
output goes to 0 level
1 1 : PME output enabled, PME pin
output is high-impedance
1 LSMIE 0 R/W ⎯ LSMI output Enable
Controls LSMI output in combination with the LSMIB
bit in HICR1. LSMI pin output is open-drain, and an
external pull-up resistor (Vcc) is needed.
LSMIE LSMIB
0 X : LSMI output disabled, other function
of pin is enabled
1 0 : LSMI output enabled, LSMI pin
output goes to 0 level
1 1 : LSMI output enabled, LSMI pin
output is Hi-Z
0 LSCIE 0 R/W ⎯ LSCI output Enable
Controls LSCI output in combination with the LSCIB bit
in HICR1. LSCI pin output is open-drain, and an
external pull-up resistor (Vcc) is needed.
LSCIE LSCIB
0 X : LSCI output disabled, other function
of pin is enabled
1 0 : LSCI output enabled, LSCI pin
output goes to 0 level
1 1 : LSCI output enabled, LSCI pin
output is high-impedance
[Legend]
X: Don't care