Datasheet

Section 22 Flash Memory
Rev. 3.00 Sep. 28, 2009 Page 718 of 910
REJ09B0350-0300
Yes
No
Start erasing
procedure program
Set FKEY to H'A5
Yes
No
Download error processing
Set the FPEFEQ
parameter
End erasing
procedure program
FPFR = 0?
Initialization error processing
Disable interrupts
and bus master operation
other than CPU
Clear FKEY to 0
Set FEBS parameter
Yes
No
Clear FKEY and erasing
error processing
*
Yes
Required
block erasing is
completed?
No
Set FKEY to H'A5
Clear FKEY to 0
1
1
Download
Initialization
Erasing
Set FMATS to value other
than H'AA to select user MAT
Set SCO to 1 and
execute download
Set FMATS to H'AA to
select user boot MAT
User-boot-MAT selection state
User-MAT selection state
User-boot-MAT
selection state
MAT
switchover
MAT
switchover
DPFR = 0?
Initialization
JSR FTDAR setting + 32
Programming
JSR FTDAR setting + 16
FPFR = 0?
Select on-chip program
to be downloaded and
specify download
destination by FTDAR
Note: * The MAT must be switched by FMATS
to perform the erasing error processing
in the user boot MAT.
Figure 22.15 Procedure for Erasing User MAT in User Boot Mode
The difference between the erasing procedures in user program mode and user boot mode depends
on whether the MAT is switched or not as shown in figure 22.15.
MAT switching is enabled by writing a specific value to FMATS. Note, however, that while the
MATs are being switched, the LSI is in an unstable state, e.g. access to a MAT is not allowed until
MAT switching is completed, and if an interrupt occurs, from which MAT the interrupt vector is
read is undetermined. Perform MAT switching in accordance with the description in section
22.10, Switching between User MAT and User Boot MAT.