Datasheet

Section 20 A/D Converter
Rev. 3.00 Sep. 28, 2009 Page 656 of 910
REJ09B0350-0300
[Legend]
ADCR:
ADCSR:
ADDRA:
ADDRB:
ADDRC:
A/D control register
A/D control/status register
A/D data register A
A/D data register B
A/D data register C
ADDRD:
ADDRE:
ADDRF:
ADDRG:
ADDRH:
A/D data register D
A/D data register E
A/D data register F
A/D data register G
A/D data register H
Conversion start trigger from
TPU or 8-bit timer
φ
φ/8
φ/2
φ/4
Module data bus
Control circuit
Internal
data bus
10-bit D/A
Comparator
+
–
Sample-and-
hold circuit
ADI interrupt
signal
Bus interface
AV CC
AV ref
AV SS
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
Successive approximation
register
Multiplexer
ADDRA ADDRB ADDRC ADDRD ADDRE ADDRF ADDRG ADDRH ADCSR ADCR
Figure 20.1 Block Diagram of A/D Converter