Datasheet

Section 19 A/D Converter
Rev. 4.00 Jun 06, 2006 page 567 of 1004
REJ09B0301-0400
19.4.4 External Trigger Input Timing
A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to 11 in
ADCR, external trigger input is enabled at the ADTRG pin. A falling edge at the ADTRG pin sets
the ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan
modes, are the same as when the ADST bit is set to 1 by software. Figure 19.6 shows the timing.
φ
ADTRG
Internal trigger signal
ADST
A/D conversion
Figure 19.6 External Trigger Input Timing
19.5 Interrupts
The A/D converter generates an interrupt (ADI) at the end of A/D conversion. The ADI interrupt
request can be enabled or disabled by the ADIE bit in ADCSR.