Datasheet

Section 11 16-Bit Free-Running Timer
Rev. 4.00 Sep 27, 2006 page 334 of 1130
REJ09B0327-0400
11.5 Sample Application
In the example below, the free-running timer is used to generate pulse outputs with a 50% duty
cycle and arbitrary phase relationship. The programming is as follows:
The CCLRA bit in TCSR is set to 1.
Each time a compare-match interrupt occurs, software inverts the corresponding output level
bit in TOCR (OLVLA or OLVLB).
FRC
Counter clear
H'FFFF
OCRA
OCRB
H'0000
FTOA
FTOB
Figure 11.17 Pulse Output (Example)