Datasheet

Appendix A Instruction Set
Rev. 4.00 Sep 27, 2006 page 959 of 1130
REJ09B0327-0400
Table A.3 Operation Code Map (3)
Instruction code: 1st byte 2nd byte
AH AL BH BL
3rd byte 4th byte
CH CL DH DL
Instruction when most significant bit of DH is 0. Instruction when most significant bit of DH is 1.
Notes: 1. r is the register specification field. 2. aa is the absolute address specification.
AH AL BH BL CH
CL
01C05 01D05 01F06 7Cr06
*
1
7Cr07
*
1
7Dr06
*
1
7Dr07
*
1
7Eaa6
*
2
7Eaa7
*
2
7Faa6
*
2
7Faa7
*
2
0
MULXS
BSET BSET BSET BSET
1
DIVXS
BNOT BNOT BNOT BNOT
2
MULXS
BCLR BCLR BCLR BCLR
3
DIVXS
BTST BTST BTST BTST
4
OR
5
XOR
6
AND
789ABCDEF
BOR
BIOR
BXOR
BIXOR
BAND
BIAND
BLD
BILD
BST
BIST
BOR
BIOR
BXOR
BIXOR
BAND
BIAND
BLD
BILD
BST
BIST