Datasheet

Appendix C I/O Port Block Diagrams
Rev. 4.00 Sep 27, 2006 page 1089 of 1130
REJ09B0327-0400
R
QD
D
P27PCR
C
Reset
R
QD
P27DR
C
Reset
WP2P
R
Q
P27DDR
C
Reset
WP2D
Mode 2, 3 WP2
8-bit PWM
PWM output enable
PWM output
Timer connection
CBLANK
CBLANK output
enable
P27
*
RP2P
RP2
Mode 2, 3
EXPE
IOSE
Mode 1
WP2P: Write to P2PCR
WP2D: Write to P2DDR
WP2: Write to port 2
RP2P: Read P2PCR
RP2: Read port 2
Note: * Set priority
Legend:
Internal data bus
Internal address bus
Hardware
standby
Mode 1
Figure C.4 Port 2 Block Diagram (Pin P27)