Datasheet

Appendix C I/O Port Block Diagrams
Rev. 4.00 Sep 27, 2006 page 1120 of 1130
REJ09B0327-0400
D
R
QD
PAnODR
C
Reset
R
Q
PAnDDR
C
Reset
IICS
WPAD
WPA
RPAO
RPA
A/D converter
Input
Analog input
Key-sense
interrupt input
KMIMR n+8
PAn
WPAD: Write to PADDR
WPA: Write to PAODR
RPAO: Read PAODR
RPA: Read port A
Notes: n = 4 to 7
1. Output enable signal
2. Open-drain control signal
*
1
*
2
Keyboard buffer
controller
Output enable
Output
Hardware
standby
Internal data bus
Internal address bus
Mode 2
EXPE
IOSE
Legend:
Figure C.36 Port A Block Diagram (Pins PA4 to PA7)