Datasheet

Section 7 Data Transfer Controller (DTC)
Rev. 4.00 Sep 27, 2006 page 188 of 1130
REJ09B0327-0400
7.2.8 DTC Vector Register (DTVECR)
7
SWDTE
0
R/(W)
*
6
DTVEC6
0
R/W
5
DTVEC5
0
R/W
4
DTVEC4
0
R/W
3
DTVEC3
0
R/W
0
DTVEC0
0
R/W
2
DTVEC2
0
R/W
1
DTVEC1
0
R/W
A value of 1 can always be written to the SWDTE bit, but 0 can only be written after 1
is read.
Bit
Initial value
Read/Write
Note: *
DTVECR is an 8-bit readable/writable register that enables or disables DTC activation by
software, and sets a vector number for the software activation interrupt.
DTVECR is initialized to H'00 by a reset and in hardware standby mode.
Bit 7—DTC Software Activation Enable (SWDTE): Specifies enabling or disabling of DTC
software activation. To clear the SWDTE bit by software, read SWDTE when set to 1, then write 0
in the bit.
Bit 7
SWDTE Description
0 DTC software activation is disabled (Initial value)
[Clearing condition]
When the DISEL bit is 0 and the specified number of transfers have not ended
1 DTC software activation is enabled
[Holding conditions]
• When data transfer ends with the DISEL bit set to 1
• When the specified number of transfers end
• During software-activated data transfer
Bits 6 to 0—DTC Software Activation Vectors 6 to 0 (DTVEC6 to DTVEC0): These bits
specify a vector number for DTC software activation.
The vector address is H'0400 + (vector number) << 1 (where << 1 indicates a 1-bit left shift). For
example, if DTVEC6 to DTVEC0 = H'10, the vector address is H'0420.