Datasheet

Section 15 Serial Communication Interface (SCI, IrDA)
Rev. 4.00 Sep 27, 2006 page 430 of 1130
REJ09B0327-0400
15.2.5 Serial Mode Register (SMR)
7
C/A
0
R/W
6
CHR
0
R/W
5
PE
0
R/W
4
O/E
0
R/W
3
STOP
0
R/W
0
CKS0
0
R/W
2
MP
0
R/W
1
CKS1
0
R/W
Bit
Initial value
Read/Write
SMR is an 8-bit register used to set the SCI’s serial transfer format and select the baud rate
generator clock source.
SMR can be read or written to by the CPU at all times.
SMR is initialized to H'00 by a reset, and in standby mode, watch mode, subactive mode, subsleep
mode, and module stop mode.
Bit 7—Communication Mode (C/A
AA
A): Selects asynchronous mode or synchronous mode as the
SCI operating mode.
Bit 7
C/A
AA
A Description
0 Asynchronous mode (Initial value
)
1 Synchronous mode
Bit 6—Character Length (CHR): Selects 7 or 8 bits as the data length in asynchronous mode. In
synchronous mode, a fixed data length of 8 bits is used regardless of the CHR setting.
Bit 6
CHR Description
0 8-bit data (Initial value
)
1 7-bit data
*
Note: * When 7-bit data is selected, the MSB (bit 7) of TDR is not transmitted, and LSB-
first/MSB-first selection is not available.