Datasheet

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 4.00 Sep 27, 2006 page 476 of 1130

REJ09B0327-0400

Wait

Start initialization

Set data transfer format in

SMR and SCMR

Yes

Set value in BRR

Note: In simultaneous transmit and receive operations, the TE bit and RE bit should both be cleared

to 0 or set to 1 simultaneously.

Clear TE and RE bits in SCR to 0

[2]

[3]

Set TE and RE bits in SCR to 1, and

set RIE, TIE, TEIE, and MPIE bits

[4]

1-bit interval elapsed?

Set CKE1 and CKE0 bits in SCR

(TE, RE bits 0)

[1]

[1] Set the clock selection in SCR. Be sure

to clear bits RIE, TIE, TEIE, and MPIE,

TE and RE, to 0.

[2] Set the data transfer format in SMR

and SCMR.

[3] Write a value corresponding to the bit

rate to BRR. This is not necessary if an

external clock is used.

[4] Wait at least one bit interval, then set

the TE bit or RE bit in SCR to 1.

Also set the RIE, TIE, TEIE, and MPIE

bits.

Setting the TE and RE bits enables the

TxD and RxD pins to be used.

Figure 15.15 Sample SCI Initialization Flowchart