Datasheet

Section 16 I
2
C Bus Interface [Option]
Rev. 4.00 Sep 27, 2006 page 511 of 1130
REJ09B0327-0400
Bit 0—Start Condition/Stop Condition Prohibit (SCP): Controls the issuing of start and stop
conditions in master mode. To issue a start condition, write 1 in BBSY and 0 in SCP. A retransmit
start condition is issued in the same way. To issue a stop condition, write 0 in BBSY and 0 in SCP.
This bit is always read as 1. If 1 is written, the data is not stored.
Bit 0
SCP Description
0 Writing 0 issues a start or stop condition, in combination with the BBSY flag
1 Reading always returns a value of 1 (Initial value)
Writing is ignored
16.2.6 I
2
C Bus Status Register (ICSR)
Bit
Initial value
Read/Write
Note: * Only 0 can be written, to clear the flags.
7
ESTP
0
R/(W)
*
6
STOP
0
R/(W)
*
5
IRTR
0
R/(W)
*
4
AASX
0
R/(W)
*
3
AL
0
R/(W)
*
0
ACKB
0
R/W
2
AAS
0
R/(W)
*
1
ADZ
0
R/(W)
*
ICSR is an 8-bit readable/writable register that performs flag confirmation and acknowledge
confirmation and control.
ICSR is initialized to H'00 by a reset and in hardware standby mode.