Datasheet

Section 16 I
2
C Bus Interface [Option]
Rev. 4.00 Sep 27, 2006 page 537 of 1130
REJ09B0327-0400
Start
Initialize
Read BBSY in ICCR
No
BBSY = 0?
Yes
Yes
Set MST = 1 and
TRS = 1 in ICCR
Write BBSY = 1
and SCP = 0 in ICCR
Clear IRIC in ICCR
Read IRIC in ICCR
No
Yes
IRIC = 1?
Write transmit data in ICDR
Read ACKB in ICSR
ACKB = 0?
No
Yes
No
Yes
Transmit mode?
Write transmit data in ICDR
Read IRIC in ICCR
IRIC = 1?
No
Yes
Clear IRIC in ICCR
Read ACKB in ICSR
End of transmission
or ACKB = 1?
No
Yes
Write BBSY = 0
and SCP = 0 in ICCR
End
Master receive mode
Read IRIC in ICCR
No
IRIC = 1?
Clear IRIC in ICCR
[1] Initialize
[2] Test the status of the SCL and SDA lines.
[3] Select master transmit mode.
[4] Start condition issuance
[5] Wait for a start condition generation
[6] Set transmit data for the first byte (slave
address + R/W).
(After writing ICDR, clear IRIC
immediately)
[7] Wait for 1 byte to be transmitted.
[8] Test the acknowledge bit, transferred from
slave device.
[10] Wait for 1 byte to be transmitted.
[11] Test for end of transfer
[12] Stop condition issuance
[9] Set transmit data for the second and
subsequent bytes.
(After writing ICDR, clear IRIC
immediately)
Figure 16.14 Flowchart for Master Transmit Mode (Example)