Datasheet

Section 22 Electrical Characteristics
Rev.7.00 Dec. 24, 2008 Page 668 of 698
REJ09B0074-0700
22.4.3 Bus Timing
Table 22.6 shows, Bus Timing.
Table 22.6 Bus Timing
Condition A: V
CC
= PLL V
CC
=Dr V
CC
=2.4 V to 3.6 V, Vref=2.4 V to V
CC
, V
SS
= PLLV
SS
=
Dr V
SS
= 0 V, f = 32.768 kHz, 6 MHz, T
a
= –20°C to +75°C (regular specifications),
T
a
= –40°C to +85°C (wide-range specifications)
Condition B: V
CC
= PLL V
CC
=Dr V
CC
=2.7 V to 3.6 V, Vref=2.7 V to V
CC
, V
SS
= PLLV
SS
=
Dr V
SS
= 0 V, f = 32.768 kHz, 6 MHz to 16 MHz, T
a
= –20°C to +75°C (regular
specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition C: V
CC
= PLL V
CC
=Dr V
CC
=3.0 V to 3.6 V, Vref=3.0 V to V
CC
, V
SS
= PLLV
SS
=
Dr V
SS
= 0 V, f = 32.768 kHz, 6 MHz to 24 MHz, T
a
= –20°C to +75°C (regular
specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition D: V
CC
= PLL V
CC
= Dr V
CC
= 3.0 V to 3.6 V, Vref = 3.0 V to V
CC
, V
SS
= PLLV
SS
=
Dr V
SS
= 0 V, f = 32.768 kHz, 16 MHz to 24 MHz, T
a
= −20°C to +75°C (regular
specifications), T
a
= −40°C to +85°C (wide-range specifications)
Condition A Condition B Condition C, D Test
Item Symbol Min. Max. Min. Max. Min. Max. Unit Conditions
Address delay time t
AD
— 90 — 50 — 30 ns
Address setup time t
AS
0.5 × t
cyc
– 60
— 0.5 × t
cyc
– 30
— 0.5 × t
cyc
– 20
— ns
Address hold time t
AH
0.5 × t
cyc
– 30
— 0.5 × t
cyc
– 15
— 0.5 × t
cyc
– 8
— ns
Figures 22.7,
22.8, 22.10
CS delay time t
CSD
— 90 — 50 — 30 ns Figures 22.7,
22.8
AS delay time t
ASD
— 90 — 50 — 25 ns Figures 22.7,
22.8, 22.10
RD delay time 1 t
RSD1
— 90 — 50 — 25 ns Figures 22.7,
22.8
RD delay time 2 t
RSD2
— 90 — 50 — 25 ns
Read data setup time t
RDS
50 — 30 — 20 — ns
Read data hold time t
RDH
0 — 0 — 0 — ns
Figures 22.7,
22.8, 22.10
Read data access
time 2
t
ACC2
— 1.5 × t
cyc
– 90
— 1.5 × t
cyc
– 65
— 1.5 × t
cyc
– 35
ns Figure 22.7