Datasheet

Section 15 A/D Converter
Rev.7.00 Dec. 24, 2008 Page 536 of 698
REJ09B0074-0700
Module data bus
Bus interface
Multiplexer
Control circuit
Internal data bus
+
A
D
C
S
R
A
D
C
R
A
D
D
R
D
A
D
D
R
C
A
D
D
R
B
A
D
D
R
A
AN0
AN1
AN2
AN3
AN14
AN15
Legend:
ADCR: A/D control register
ADCSR: A/D control/status register
ADDRA: A/D data register A
ADDRB: A/D data register B
ADDRC: A/D data register C
ADDRD: A/D data register D
ADTRG
Time conversion start trigger from TPU
ADI interrupt signal
Successive
approximation register
Sample and
hold circuit
Comparator
φ/2
φ/4
φ/8
φ/16
10 bit D/A
Off during A/D conversion standby
On during A/D conversion
Vref
VCC
VSS
Figure 15.1 Block Diagram of A/D Converter