Datasheet

Section 17 Flash Memory (F-ZTAT Version)
Rev.7.00 Dec. 24, 2008 Page 564 of 698
REJ09B0074-0700
17.5.3 Erase Block Register 1 (EBR1)
EBR1 specifies the flash memory erase area block. EBR1 is initialized to H'00 when the SWE1
bit in FLMCR is 0. Do not set more than one bit at a time, as this will cause all the bits in EBR1
and EBR2 to be automatically cleared to 0.
Bit
Bit
Name
Initial
Value
R/W Description
7 EB7 0 R/W When this bit is set to 1, 8 kbytes of EB7 (H'00E000 to H'00FFFF)
are to be erased.
6 EB6 0 R/W When this bit is set to 1, 8 kbytes of EB6 (H'00C000 to H'00DFFF)
are to be erased.
5 EB5 0 R/W When this bit is set to 1, 16 kbytes of EB5 (H'008000 to H'00BFFF)
are to be erased.
4 EB4 0 R/W When this bit is set to 1, 28 kbytes of EB4 (H'001000 to H'007FFF)
are to be erased.
3 EB3 0 R/W When this bit is set to 1, 1 kbyte of EB3 (H'000C00 to H'000FFF) is
to be erased.
2 EB2 0 R/W When this bit is set to 1, 1 kbyte of EB2 (H'000800 to H'000BFF) is
to be erased.
1 EB1 0 R/W When this bit is set to 1, 1 kbyte of EB1 (H'000400 to H'0007FF) is
to be erased.
0 EB0 0 R/W When this bit is set to 4, 1 kbyte of EB0 (H'000000 to H'0003FF) is
to be erased.
17.5.4 Erase Block Register 2 (EBR2)
EBR2 specifies the flash memory erase area block. EBR2 is initialized to H'00 when the SWE1
bit in FLMCR1 is 0. Do not set more than one bit at a time, as this will cause all the bits in EBR1
and EBR2 to be automatically cleared to 0.
Note: These registers are reserved on the HD64F2211 and HD64F2211U. Only H'00 should be
written to them.
Bit
Bit
Name
Initial
Value
R/W Description
7 to 2 — All 0 R/W Reserved
The write value should always be 0.
1 EB9 0 R/W When this bit is set to 1, 32 kbytes of EB9 (H'018000 to H'01FFFF)
are to be erased.
0 EB8 0 R/W When this bit is set to 1, 32 kbytes of EB8 (H'010000 to H'017FFF)
are to be erased.