Datasheet

Section 12 Serial Communication Interface
Rev.7.00 Dec. 24, 2008 Page 399 of 698
REJ09B0074-0700
Operating Frequency φ (MHz)
18 19.6608 20 24
Bit Rate
(bps) n N Error (%) n N Error (%) n N Error (%) n N Error (%)
110 3 79 –0.12 3 86 0.31 3 88 –0.25 3 106 –0.44
150 2 233 0.16 2 255 0.00 3 64 0.16 3 77 0.16
300 2 116 0.16 2 127 0.00 2 129 0.16 2 155 0.16
600 1 233 0.16 1 255 0.00 2 64 0.16 2 77 0.16
1200 1 116 0.16 1 127 0.00 1 129 0.16 1 155 0.16
2400 0 233 0.16 0 255 0.00 1 64 0.16 1 77 0.16
4800 0 116 0.16 0 127 0.00 0 129 0.16 0 155 0.16
9600 0 58 –0.69 0 63 0.00 0 64 0.16 0 77 0.16
19200 0 28 1.02 0 31 0.00 0 32 –1.36 0 38 0.16
31250 0 17 0.00 0 19 –1.70 0 19 0.00 0 23 0.00
38400 0 14 –2.34 0 15 0.00 0 15 1.73 0 19 –2.34
Note: This table shows bit rates when the ABCS bit in SEMRA_0 is cleared to 0.
When the ABCS bit in SEMR0 is set to 1, the bit rates are twice those shown in this table.
In this LSI, operating frequency φ must be 6 MHz or greater.
Table 12.4 Maximum Bit Rate for Each Frequency (Asynchronous Mode)
Maximum Bit Rate
(kbps)
Maximum Bit Rate
(kbps)
φ (MHz) ABCS = 0 ABCS = 1 n N φ (MHz) ABCS = 0 ABCS = 1 n N
2 62.5 125.0 0 0 9.8304 307.2 614.4 0 0
2.097152 65.536 131.027 0 0 10 312.5 625.0 0 0
2.4576 76.8 153.6 0 0 12 375.0 750.0 0 0
3 93.75 187.5 0 0 12.288 384.0 768.0 0 0
3.6864 115.2 230.4 0 0 14 437.5 875.0 0 0
4 125.0 250.0 0 0 14.7456 460.8 921.6 0 0
4.9152 153.6 307.2 0 0 16 500.0 1000.0 0 0
5 156.25 312.5 0 0 17.2032 537.6 1075.2 0 0
6 187.5 375.0 0 0 18 562.5 1125.0 0 0
6.144 192.0 384.0 0 0 19.6608 614.4 1228.8 0 0
7.3728 230.4 460.8 0 0 20 625.0 1250.0 0 0
8 250.0 500.0 0 0 24 750.0 1500.0 0 0