Datasheet

Section 1 Overview
Rev. 6.00 Mar. 18, 2010 Page 1 of 982
REJ09B0054-0600
Section 1 Overview
1.1 Features
• High-speed H8S/2000 central processing unit with an internal 16-bit architecture
⎯ Upward-compatible with H8/300 and H8/300H CPUs on an object level
⎯ Sixteen 16-bit general registers
⎯ 65 basic instructions
• Various peripheral functions
⎯ PC break controller
⎯ DMA controller (DMAC)
Supported only by the H8S/2239 Group.
⎯ Data transfer controller (DTC)
⎯ 16-bit timer-pulse unit (TPU)
H8S/2258 Group, H8S/2239 Group, H8S/2238 Group, and H8S/2237 Group: Six channels
H8S/2227 Group: Three channels
⎯ 8-bit timer (TMR)
H8S/2258 Group, H8S/2239 Group, H8S/2238 Group: Four channels
H8S/2237 Group, H8S/2227 Group: Two channels
⎯ Watchdog timer (WDT)
⎯ Serial communication interface (SCI)
H8S/2258 Group, H8S/2239 Group, H8S/2238 Group, and H8S/2237 Group: Four
channels (SCI_0 to SCI_3)
H8S/2227 Group: Three channels (SCI_0, SCI_1, and SCI_3)
⎯ I
2
C bus interface (IIC)
Optional function for the H8S/2258 Group, H8S/2239 Group, and H8S/2238 Group
⎯ 10-bit A/D converter
⎯ 8-bit D/A converter
Not available in the H8S/2227 Group.
⎯ IEBus controller (IEB)
H8S/2258 Group: One channel