Datasheet

Section 15 Serial Communication Interface (SCI)
Rev. 6.00 Mar. 18, 2010 Page 551 of 982
REJ09B0054-0600
15.2 Input/Output Pins
Table 15.1 shows the pin configuration for each SCI channel.
Table 15.1 Pin Configuration
Channel Pin Name
*
1
I/O Function
SCK0 I/O SCI0 clock input/output
RxD0 Input SCI0 receive data input
0
TxD0 Output SCI0 transmit data output
SCK1 I/O SCI1 clock input/output
RxD1 Input SCI1 receive data input
1
TxD1 Output SCI1 transmit data output
SCK2 I/O SCI2 clock input/output
RxD2 Input SCI2 receive data input
2
*
2
TxD2 Output SCI2 transmit data output
SCK3 I/O SCI3 clock input/output 3
RxD3 Input SCI3 receive data input
TxD3 Output SCI3 transmit data output
Notes: 1. Pin names SCK, RxD, and TxD are used in the text for all channels, omitting the
channel designation.
2. The channel is not provided for the H8S/2227 Group.
15.3 Register Descriptions
The SCI has the following registers for each channel. For details on register addresses and register
states during each process, refer to appendix A, Internal I/O Register. The serial mode register
(SMR), serial status register (SSR), and serial control register (SCR) are described separately for
normal serial communication interface mode and Smart Card interface mode because their bit
functions differ in part.
• Receive shift register (RSR)
• Receive data register (RDR)
• Transmit data register (TDR)
• Transmit shift register (TSR)
• Serial mode register (SMR)
• Serial control register (SCR)