Datasheet

Section 20 Flash Memory (F-ZTAT Version)
Rev. 6.00 Mar. 18, 2010 Page 745 of 982
REJ09B0054-0600
20.12 Power-Down States for Flash Memory
In user mode, the flash memory will operate in either of the following states:
• Normal operating mode
The flash memory can be read and written to at high speed.
• Power-down state
The flash memory can be read when part of the power circuit is halted and the LSI operates by
subclocks.
• Standby mode
All flash memory circuits are halted.
Table 20.6 shows the correspondence between the operating modes of this LSI and the flash
memory. When the flash memory returns to its normal operating state from standby mode, a
period to stabilize the power supply circuits that were stopped is needed. When the flash memory
returns to its normal operating state, bits STS2 to STS0 in SBYCR must be set to provide a wait
time of at least 100 µs, even when the external clock is being used.
Table 20.6 Flash Memory Operating States
LSI Operating State Flash Memory Operating State
Active mode Normal operating mode
Sleep mode Normal operating mode
Watch mode
Standby mode
Standby mode
Subactive mode
Subsleep mode
PDWND = 0: Power-down mode (read only)
PDWND = 1: Normal operating mode (read only)
20.13 Flash Memory Programming and Erasing Precautions
Precautions concerning the use of on-board programming mode, the RAM emulation function, and
programmer mode are summarized below.
Use the Specified Voltages and Timing for Programming and Erasing: Applied voltages in
excess of the rating can permanently damage the device. Use a PROM programmer that supports
the Renesas Technology flash memory on-chip microcomputer device type (FZTAT512V3A,
FZTAT256V3A, or FZTAT128V3A).