Datasheet

Appendix B Internal I/O Registers
Rev.7.00 Feb. 14, 2007 page 982 of 1108
REJ09B0089-0700
PEDDR—Port E Data Direction Register H'FEBD Port E
7
PE7DDR
0
W
6
PE6DDR
0
W
5
PE5DDR
0
W
4
PE4DDR
0
W
3
PE3DDR
0
W
0
PE0DDR
0
W
2
PE2DDR
0
W
1
PE1DDR
0
W
Specify input or output for individual port E pins
Bit
Initial value
Read/Write
:
:
:
PFDDR—Port F Data Direction Register H'FEBE Port F
7
PF7DDR
1
W
0
W
6
PF6DDR
0
W
0
W
5
PF5DDR
0
W
0
W
4
PF4DDR
0
W
0
W
3
PF3DDR
0
W
0
W
0
PF0DDR
0
W
0
W
2
PF2DDR
0
W
0
W
1
PF1DDR
0
W
0
W
Specify input or output for individual port F pins
Bit
Modes 4 to 6
*
Initial value
Read/Write
Mode 7
*
Initial value
Read/Write
:
:
:
:
:
Note: * Modes 6 and 7 cannot be used in the ROMless versions.