Datasheet

Appendix B Internal I/O Registers
Rev.7.00 Feb. 14, 2007 page 983 of 1108
REJ09B0089-0700
PGDDR—Port G Data Direction Register H'FEBF Port G
7
⎯
Undefined
⎯
Undefined
⎯
6
⎯
Undefined
⎯
Undefined
⎯
5
⎯
Undefined
⎯
Undefined
⎯
4
PG4DDR
1
W
0
W
3
PG3DDR
0
W
0
W
0
PG0DDR
0
W
0
W
2
PG2DDR
0
W
0
W
1
PG1DDR
0
W
0
W
Specify input or output for individual port G pins
Note: * Modes 6 and 7 cannot be used in the ROMless versions.
Bit
Modes 4 and 5
Initial value
Read/Write
Modes 6 and 7
Initial value
Read/Write
:
:
:
*
:
: