Datasheet

Appendix B Internal I/O Registers
Rev.7.00 Feb. 14, 2007 page 997 of 1108
REJ09B0089-0700
SYSCR—System Control Register H'FF39 MCU
7
⎯
0
R/W
6
⎯
0
⎯
5
INTM1
0
R/W
4
INTM0
0
R/W
3
NMIEG
0
R/W
0
RAME
1
R/W
2
LWROD
0
R/W
1
⎯
0
R/W
Bit
Initial value
Read/Write
:
:
:
Reserved
Only 0 should be written to this bit
RAM Enable
0 On-chip RAM disabled
1 On-chip RAM enabled
NMI Input Edge Select
0 Falling edge
1 Rising edge
Interrupt Control Mode Selection
0
1
Interrupt control mode 00
1
0
1
Setting prohibited
Interrupt control mode 2
Setting prohibited
LWR Output Disable
0 PF3 is designated as LWR output pin
1 PF3 is designated as I/O port, and
does not function as LWR output pin
Reserved
Only 0 should be written to this bit