Datasheet

Appendix C I/O Port Block Diagrams
Rev.7.00 Feb. 14, 2007 page 1076 of 1108
REJ09B0089-0700
R
P3nDDR
C
QD
Reset
WDDR3
Reset
WDR3
R
C
QD
P3n
RDR3
RODR3
RPOR3
Internal data bus
SCI module
Serial clock output
enable
Interrupt controller
IRQ interrupt input
P3nDR
Reset
WODR3
R
C
QD
P3nODR
*
1
*
2
Serial clock input
Legend:
WDDR3: Write to P3DDR
WDR3: Write to P3DR
WODR3: Write to P3ODR
RDR3: Read P3DR
RPOR3: Read port 3
RODR3: Read P3ODR
Notes: n = 4 or 5
1. Output enable signal
2. Open drain control signal
Serial clock output
Serial clock input
enable
Figure C.3(c) Port 3 Block Diagram (Pins P34 and P35)