Datasheet

Appendix C I/O Port Block Diagrams
Rev.7.00 Feb. 14, 2007 page 1078 of 1108
REJ09B0089-0700
C.5 Port A
R
PAnPCR
C
QD
Reset
WPCRA
Reset
WDRA
R
C
QD
PAn
RDRA
RODRA
RPORA
Internal address bus
PAnDR
Reset
WDDRA
R
Modes 6 and 7
Modes 4 and 5
C
QD
PAnDDR
Reset
WODRA
RPCRA
R
C
QD
PAnODR
*
1
*
2
Mode 7
Modes 4 to 6
Internal data bus
Legend:
WDDRA: Write to PADDR
WDRA: Write to PADR
WODRA: Write to PAODR
WPCRA: Write to PAPCR
RDRA: Read PADR
RPORA: Read port A
RODRA: Read PAODR
RPCRA: Read PAPCR
Notes: n = 0 to 3
1. Output enable signal
2. Open drain control signal
Figure C.5 Port A Block Diagram (Pins PA0 to PA3)