Datasheet

Section 8 I/O Ports
Rev.7.00 Feb. 14, 2007 page 292 of 1108
REJ09B0089-0700
Pin Selection Method and Pin Functions
PF1/BACK/IRQ1/
CS5
The pin function is switched as shown below according to the operating mode,
and the BRLE bit in BCRL, PF1CS5S bit in PFCR1, and CS25E bit in PFCR2
and PF1DDR bit.
Operating
Mode Modes 4 to 6
*
1
Mode 7
*
1
BRLE 0 1 —
PF1DDR 0 1 — 0 1
CS25E — 0 1 — — —
PF1CS5S — — 0 1 — — —
Pin function PF1
input
pin
PF1
output pin
CS5
output
pin
BACK
output
pin
PF1
input
pin
PF1
output
pin
IRQ1 interrupt input pin
*
2
PF0/BREQ/IRQ0/
CS4
The pin function is switched as shown below according to the operating mode,
and the BRLE bit in BCRL and PF0CS4S bit in PFCR1 and CS25E bit in
PFCR2 and PF0DDR bit.
Operating
Mode Modes 4 to 6
*
1
Mode 7
*
1
BRLE 0 1 —
PF0DDR 0 1 — 0 1
CS25E — 0 1 — — —
PF0CS4S — — 0 1 — — —
Pin function PF0
input
pin
PF0
output pin
CS4
output
pin
BREQ
output
pin
PF0
input
pin
PF0
output
pin
IRQ0 interrupt input pin
*
2
Notes: 1. Modes 6 and 7 are not available in the ROMless versions.
2. When this pin is used as an external interrupt input, the pin function should be set as a
port (PFn) input pin.
3. Valid only in 8-bit-bus mode.