Datasheet

Section 13 Smart Card Interface
Rev.7.00 Feb. 14, 2007 page 503 of 1108
REJ09B0089-0700
13.2 Register Descriptions
Registers added with the smart card interface and bits for which the function changes are
described here.
13.2.1 Smart Card Mode Register (SCMR)
Bit : 7 6 5 4 3 2 1 0
— — — — SDIR SINV — SMIF
Initial value : 1 1 1 1 0 0 1 0
R/W : — — — — R/W R/W — R/W
SCMR is an 8-bit readable/writable register that selects the smart card interface function.
SCMR is initialized to H'F2 by a reset and in hardware standby mode. In software standby mode
and module stop mode it retains its previous state.
Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 1.
Bit 3—Smart Card Data Transfer Direction (SDIR): Selects the serial/parallel conversion
format.
Bit 3
SDIR Description
0 TDR contents are transmitted LSB-first (Initial value)
Receive data is stored in RDR LSB-first
1 TDR contents are transmitted MSB-first
Receive data is stored in RDR MSB-first
Bit 2—Smart Card Data Invert (SINV): Specifies inversion of the data logic level. This
function is used together with the SDIR bit for communication with an inverse convention card.
The SINV bit does not affect the logic level of the parity bit. For parity-related setting procedures,
see section 13.3.4, Register Settings.