Datasheet

Section 17 ROM
Rev.7.00 Feb. 14, 2007 page 642 of 1108
REJ09B0089-0700
17.14.2 Flash Memory Control Register 2 (FLMCR2)
Bit : 7 6 5 4 3 2 1 0
FLER SWE2 ESU2 PSU2 EV2 PV2 E2 P2
Initial value : 0 0 0 0 0 0 0 0
R/W : R R/W R/W R/W R/W R/W R/W R/W
FLMCR2 is an 8-bit register used for flash memory operating mode control. Program-verify mode
or erase-verify mode for addresses H'040000 to H'07FFFF is entered by setting SWE2 to 1 then
setting the EV2 or PV2 bit. Program mode for addresses H'040000 to H'07FFFF is entered by
setting SWE2 to 1 then setting the PSU2 bit, and finally setting the P2 bit. Erase mode for
addresses H'040000 to H'07FFFF is entered by setting SWE2 to 1 then setting the ESU2 bit, and
finally setting the E2 bit. FLMCR2 is initialized to H'00 by a reset, and in hardware standby mode
and software standby mode. When on-chip flash memory is disabled, a read will return H'00, and
writes are invalid.
Writes to bits ESU2, PSU2, EV2, and PV2 only when SWE2 = 1; writes to the E2 bit only when
SWE2 = 1, and ESU2 = 1; and writes to the P2 bit only when SWE2 = 1, and PSU2 = 1.
Bit 7—Flash Memory Error (FLER): Indicates that an error has occurred during an operation on
flash memory (programming or erasing). When FLER is set to 1, flash memory goes to the error-
protection state.
Bit 7
FLER Description
0 Flash memory is operating normally (Initial value)
Flash memory program/erase protection (error protection) is disabled
[Clearing condition]
Reset or hardware standby mode
1 An error has occurred during flash memory programming/erasing
Flash memory program/erase protection (error protection) is enabled
[Setting condition]
See section 17.17.3, Error Protection
Bit 6—Software Write Enable Bit 2 (SWE2): Enables or disables flash memory programming
and erasing for addresses H'040000 to H'07FFFF. This bit should be set when setting FLMCR2
bits 5 to 0, and EBR2 bits 7 to 4.
When SWE2 = 1, the flash memory can only be read in program-verify or erase-verify mode.