Datasheet

Appendix A Instruction Set
Rev.7.00 Feb. 14, 2007 page 868 of 1108
REJ09B0089-0700
(2) Arithmetic Instructions
Addressing Mode/
Instruction Length (Bytes)
Operand Size
#xx
Rn
@ERn
@(d,ERn)
@-ERn/@ERn+
@aa
@(d,PC)
@@aa
Mnemonic
ADD ADDX ADDS INC DAA SUB
ADD.B #xx:8,Rd B 2 ADD.B Rs,Rd B 2 ADD.W #xx:16,Rd W 4 ADD.W Rs,Rd W 2 ADD.L #xx:32,ERd L 6 ADD.L ERs,ERd L 2 ADDX #xx:8,Rd B 2 ADDX Rs,Rd B 2 ADDS #1,ERd L 2 ADDS #2,ERd L 2 ADDS #4,ERd L 2 INC.B Rd B 2 INC.W #1,Rd W 2 INC.W #2,Rd W 2 INC.L #1,ERd L 2 INC.L #2,ERd L 2 DAA Rd B 2 SUB.B Rs,Rd B 2 SUB.W #xx:16,Rd W 4
Rd8+#xx:8→Rd8 ⎯ 1
Rd8+Rs8→Rd8 ⎯ 1 Rd16+#xx:16→Rd16 ⎯ [3] 2 Rd16+Rs16→Rd16 ⎯ [3] 1 ERd32+#xx:32→ERd32 ⎯ [4] 3 ERd32+ERs32→ERd32 ⎯ [4] 1 Rd8+#xx:8+C→Rd8 ⎯ [5] 1 Rd8+Rs8+C→Rd8 ⎯ [5] 1 ERd32+1→ERd32 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 1
ERd32+2→ERd32 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 1
ERd32+4→ERd32 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 1
Rd8+1→Rd8 ⎯ ⎯ ⎯ 1
Rd16+1→Rd16 ⎯ ⎯ ⎯ 1
Rd16+2→Rd16 ⎯ ⎯ ⎯ 1
ERd32+1→ERd32
⎯ ⎯ ⎯ 1
ERd32+2→ERd32 ⎯ ⎯ ⎯ 1
Rd8 decimal adjust→Rd8 ⎯ * * 1 Rd8-Rs8→Rd8 ⎯ 1 Rd16-#xx:16→Rd16 ⎯ [3] 2
Operation
Condition Code
IHNZVC
Advanced
No. of States
*1
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