Datasheet

Appendix A Instruction Set
Rev.7.00 Feb. 14, 2007 page 884 of 1108
REJ09B0089-0700
(7) System Control Instructions
Addressing Mode/
Instruction Length (Bytes)
Operand Size
#xx
Rn
@ERn
@(d,ERn)
@-ERn/@ERn+
@aa
@(d,PC)
@@aa
Mnemonic
TRAPA
RTE
SLEEP
LDC
TRAPA #xx:2
RTE
SLEEP
LDC #xx:8,CCR B 2
LDC #xx:8,EXR B 4
LDC Rs,CCR B 2
LDC Rs,EXR B 2
LDC @ERs,CCR W 4
LDC @ERs,EXR W 4
LDC @(d:16,ERs),CCR W 6
LDC @(d:16,ERs),EXR W 6
LDC @(d:32,ERs),CCR W 10
LDC @(d:32,ERs),EXR W 10
LDC @ERs+,CCR W 4
LDC @ERs+,EXR W 4
LDC @aa:16,CCR W 6
LDC @aa:16,EXR W 6
LDC @aa:32,CCR W 8
LDC @aa:32,EXR W 8
PC@-SP,CCR@-SP, 1 ⎯ ⎯ ⎯ ⎯ ⎯ 8 [9]
EXR@-SP,<vector>PC
EXR@SP+,CCR@SP+, 5 [9]
PC@SP+
Transition to power-down state ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2
#xx:8CCR 1
#xx:8EXR ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2
Rs8CCR 1
Rs8EXR ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 1
@ERsCCR 3
@ERsEXR ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 3
@(d:16,ERs)CCR 4
@(d:16,ERs)EXR ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 4
@(d:32,ERs)CCR 6
@(d:32,ERs)EXR ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 6
@ERsCCR,ERs32+2ERs32 4
@ERsEXR,ERs32+2ERs32 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
4
@aa:16CCR 4
@aa:16EXR ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 4
@aa:32CCR 5
@aa:32EXR ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 5
Operation
Condition Code
IHNZVC
Advanced
No. of States
*1
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