Datasheet

Appendix A Instruction Set
Rev.7.00 Feb. 14, 2007 page 933 of 1108
REJ09B0089-0700
Instruction
XOR.L ERs,ERd R:W 2nd R:W NEXT XORC #xx:8,CCR R:W NEXT XORC #xx:8,EXR R:W 2nd R:W NEXT Reset exception R:W VEC R:W VEC+2
Internal operation,
R:W
*
5
handling
1 state
Interrupt exception R:W
*
6
Internal operation,
W:W stack (L) W:W stack (H)
W:W stack (EXR)
R:W:M VEC R:W VEC+2
Internal operation,
R:W
*
7
handling
1 state
1 state
Notes: 1. EAs is the contents of ER5. EAd is the contents of ER6. 2. EAs is the contents of ER5. EAd is the contents of ER6. Both registers are incremented by 1 after execution of the instruction. n is the initial value of R4L or R4. If n = 0, these bus cycles are not executed. 3. Repeated two times to save or restore two registers, three times for three registers, or four times for four registers. 4. Start address after return. 5. Start address of the program. 6. Prefetch address, equal to two plus the PC value pushed onto the stack. In recovery from sleep mode or software standby mode the read operation is replaced by an internal operation. 7. Start address of the interrupt handling routine. 8. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
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