Datasheet

Section 14 Serial Communication Interface (SCI, IrDA)
Rev.6.00 Mar. 18, 2009 Page 548 of 980
REJ09B0050-0600
Bit Bit Name Initial Value R/W Description
4 O/E 0 R/W Parity Mode (enabled only when the PE bit is 1 in
asynchronous mode)
0: Selects even parity.
1: Selects odd parity.
3 STOP 0 R/W Stop Bit Length (enabled only in asynchronous
mode)
Selects the stop bit length in transmission.
0: 1 stop bit
1: 2 stop bits
In reception, only the first stop bit is checked
regardless of the STOP bit setting. If the second
stop bit is 0, it is treated as the start bit of the next
transmit character.
2 MP 0 R/W Multiprocessor Mode (enabled only in
asynchronous mode)
When this bit is set to 1, the multiprocessor
communication function is enabled. The PE bit
and O/E bit settings are invalid in multiprocessor
mode.
1
0
CKS1
CKS0
0
0
R/W
R/W
Clock Select 1 and 0:
These bits select the clock source for the on-chip
baud rate generator.
00: φ clock (n = 0)
01: φ/4 clock (n = 1)
10: φ/16 clock (n = 2)
11: φ/64 clock (n = 3)
For the relation between the bit rate register
setting and the baud rate, see section 14.3.9, Bit
Rate Register (BRR). n is the decimal display of
the value of n in BRR (see section 14.3.9, Bit Rate
Register (BRR)).