Datasheet

Rev.7.00 Mar. 18, 2009 page xvi of lxvi
REJ09B0109-0700
Item Page Revision (See Manual for Details)
17.1 Features
Figure 17.1 Block
Diagram of A/D
Converter
806 Figure amended
10-bit D/A
AVCC
Vref
AVSS
21.1 Features 862 Description amended
• Programming/erase protection
There are three types of flash memory programming/erase
protection that may be selected: hardware protection,
software protection, and error protection.
21.1.1 Operating
Mode
864 Description amended
When the mode pins are set in the reset state and a reset start
is performed, the MCU transitions to an operating mode as
shown in figure 21.2.
21.3.1 Programming/
Erasing Interface
Register
872 Description amended
• Flash Code Control and Status Register (FCCS)
FCCS is used to request monitoring of flash memory
programming/erase errors or downloading of on-chip
programs.
21.3.2 Programming/
Erasing Interface
Parameter
879 Description amended
When download, initialization, or on-chip program is executed,
registers of the CPU except for ER0 and ER1 are stored. The
return value of the processing result is written in ER0, ER1.
Since the stack area is used for storing the registers except for
ER0, ER1, the stack area must be saved at the processing start.
(A maximum size of a stack area to be used is 128 bytes.)
21.3.3 Flash Vector
Address Control
Register (FVACR)
889 Description amended
FVACR modifies the space from which the vector table data of
the NMI interrupts is read. Normally the vector table data is read
from the address spaces from H'00001C to H'00001F.