Datasheet

Section 10 I/O Ports
Rev.7.00 Mar. 18, 2009 page 460 of 1136
REJ09B0109-0700
Mode 7
Port Description Mode 1
*
3
Mode 2
*
3
Mode 4
EXPE = 1 EXPE = 0
Input/
Output
Type
PH3/CS7/(IRQ7)/OE/CKE
*
1
PH3/(IRQ7)
PH2/CS6/(IRQ6) PH2/(IRQ6)
PH1/CS5/RAS5/SDRAMφ
*
1
PH1/SDRAMφ
*
1
Port
H
General I/O port
also functioning
as interrupt inputs
and bus control
I/Os
PH0/CS4/RAS4/WE
*
1
PH0
Only PH2
and PH3
are
Schmitt-
triggered
inputs
when
used as
the IRQ
input
Notes: 1. Not supported by the H8S/2378 0.18μm F-ZTAT Group, H8S/2377, H8S/2375, and
H8S/2373.
2. Not supported by the H8S/2375, H8S/2375R, H8S/2373, and H8S/2373R.
3. Only modes 1 and 2 are supported on ROM-less versions.
10.1 Port 1
Port 1 is an 8-bit I/O port that also has other functions. The port 1 has the following registers.
• Port 1 data direction register (P1DDR)
• Port 1 data register (P1DR)
• Port 1 register (PORT1)
10.1.1 Port 1 Data Direction Register (P1DDR)
The individual bits of P1DDR specify input or output for the pins of port 1.
Bit Bit Name Initial Value R/W Description
7 P17DDR 0 W
6 P16DDR 0 W
5 P15DDR 0 W
4 P14DDR 0 W
3 P13DDR 0 W
2 P12DDR 0 W
1 P11DDR 0 W
When a pin function is specified to a general
purpose I/O, setting this bit to 1 makes the
corresponding port 1 pin an output pin, while
clearing this bit to 0 makes the pin an input pin.
0 P10DDR 0 W