Datasheet

Section 10 I/O Ports
Rev.7.00 Mar. 18, 2009 page 463 of 1136
REJ09B0109-0700
Mode 7 (EXPE = 0)
EDRAKE ⎯
TPU channel 2
settings
(1) in table
below
(2) in table below
P17DDR ⎯ 0 1 1
NDER15 ⎯ ⎯ 0 1
P17 input P17 output PO15 output Pin function TIOCB2 output
TIOCB2 input
*
1
TCLKD input
*
2
Notes: 1. TIOCB2 input when MD3 to MD0 = B'0000, B'000, and B'01×× and IOB3 = 1.
2. TCLKD input when the setting for either TCR_0 or TCR_5 is TPSC2 to TPSC0 = B'111.
TCLKD input when channels 2 and 4 are set to phase counting mode.
3. Not supported by the H8S/2375, H8S/2375R, H8S/2373, and H8S/2373R.
TPU channel 2
settings
(2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000, B'01×× B'0010 B'0011
IOB3 to IOB0 B'0000
B'0100
B'1×××
B'0001 to
B'0011
B'0101 to
B'0111
⎯ B'××00 Other than B'××00
CCLR1, CCLR0 ⎯ ⎯ ⎯ ⎯ Other
than
B'10
B'10
Output function ⎯ Output
compare output
⎯ ⎯ PWM mode
2 output
⎯
Legend:
×: Don’t care