Datasheet

Section 1 Overview
Rev.7.00 Mar. 18, 2009 page 22 of 1136
REJ09B0109-0700
Pin No.
Type Symbol
H8S/2378
0.18μm
F-ZTAT Group,
H8S/2378R
0.18μm
F-ZTAT Group
(LQFP-144)
H8S/2378
0.18μm
F-ZTAT Group,
H8S/2378R
0.18μm
F-ZTAT Group
(LGA-145)
H8S/2377
H8S/2377R
H8S/2375
H8S/2373
H8S/2375R
H8S/2373R
I/O Function
Address
bus
A23 to A0 31 to 26,
24 to 19,
17 to 11,
9 to 5
J3, K2, J1,
K4, H3, J2,
J4, G3, H2,
G1, H4, G4,
F1, G2, F3,
E4, E1, F2,
E3, D1, D3,
D2, C3, C1
31 to 26,
24 to 19,
17 to 11,
9 to 5
31 to 26,
24 to 19,
17 to 11,
9 to 5
Output These pins output
an address.
Data bus D15 to D0 80 to 73, 71,
69 to 63
K11, K12,
L13, L11,
M12, L12,
N13, M13,
N11, M11,
N10, L9, M10,
N9, K10, L8
80 to 73,
71,
69 to 63
80 to 73,
71,
69 to 63
Input/
output
These pins
constitute a
bidirectional data
bus.
Bus
control
CS7 to
CS0
38 to 35,
110 to 107
M2, N2, M1,
L1, A13, A12,
B13, D11
38 to 35,
110 to 107
38 to 35,
110 to 107
Output Signals that select
division areas 7 to 0
in the external
address space
AS 90 G10 90 90 Output When this pin is
low, it indicates that
address output on
the address bus is
valid.
RD 89 G12 89 89 Output When this pin is
low, it indicates that
the external
address space is
being read.