Datasheet

Section 21 Flash Memory (0.18-μm F-ZTAT Version)
Rev.7.00 Mar. 18, 2009 page 873 of 1136
REJ09B0109-0700
Bit
Bit
Name
Initial
Value
R/W Description
7 ⎯ 1 R Reserved
This bit is always read as 0. The write value should
always be 1.
6, 5 ⎯ All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
4 FLER 0 R Flash Memory Error
Indicates an error occurs during programming and
erasing flash memory. When FLER is set to 1, flash
memory enters the error protection state. This bit is
initialized at transition to a power-on reset or hardware
standby mode.
When FLER is set to 1, high voltage is applied to the
internal flash memory. To reduce the damage to flash
memory, the reset must be released after the reset
period of 100 μs which is longer than normal.
0: Flash memory operates normally
Programming/erasing protection for flash memory
(error protection) is invalid.
[Clearing condition] At a power-on reset or in
hardware standby mode
1: Indicates an error occurs during programming/erasing
flash memory.
Programming/erasing protection for flash memory
(error protection) is valid.
[Setting condition]
• When an interrupt, such as NMI, occurs during
programming/erasing flash memory.
• When the flash memory is read during
programming/erasing flash memory
• When the SLEEP instruction is executed during
programming/erasing flash memory
• When a bus master other than the CPU, such as the
DMAC, DTC, or BREQ, gets bus mastership during
programming/erasing flash memory.