Datasheet

Section 21 Flash Memory (0.18-μm F-ZTAT Version)
Rev.7.00 Mar. 18, 2009 page 890 of 1136
REJ09B0109-0700
However, the vector table can be read from the on-chip RAM by the FVACR setting. FVACR is
initialized to H'00 at a power-on reset or in hardware standby mode.
All interrupts including NMI must be prohibited in the programming/erasing processing or during
downloading on-chip program. When the NMI interrupt is necessary, FVACR must be set and the
interrupt exception processing routine must be set in the on-chip RAM space or in the external
space.
Bit
Bit
Name
Initial
Value
R/W Description
7 FVCHGE 0 R/W Vector Switch Function Valid
Selects whether the function for modifying the space
from which the vector table data is read is valid or
invalid. When FVCHGE = 1, the vector table data can be
read from the on-chip RAM space.
0: Function for modifying the space from which the
vector table data is read is invalid (Initial value)
1: Function for modifying the space from which the
vector table data is read is valid
6 to 4 ⎯ All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
3
2
1
0
FVSEL3
FVSEL2
FVSEL1
FVSEL0
0
0
0
0
R/W
R/W
R/W
R/W
Interrupt Source Select
The vector table of the NMI interrupt processing can be
in the on-chip RAM space by setting this bit.
0000: Vector table data is in area 0
(H'00001C to H'00001F)
0001: Setting prohibited
001×: Setting prohibited
01××: Setting prohibited
1000: Vector table data is in the on-chip RAM space
(H'FFA01C to H'FFA01F)
1001: Setting prohibited
101×: Setting prohibited
11××: Setting prohibited
Legend:
×: Don’t care