Datasheet

Rev.7.00 Mar. 18, 2009 page xiv of lxvi
REJ09B0109-0700
Item Page Revision (See Manual for Details)
16.3.5 I2C Bus Status
Register (ICSR)
782 Table amended
Bit Bit Name Initial Value R/W Description
7 TDRE 0 R/W Transmit Data Register Empty
[Setting condition]
• When data is transferred from ICDRT to ICDRS
and ICDRT becomes empty
• When TRS has been set
• When a transition from the receive mode to the
transmit mode has been made in the slave mode
[Clearing conditions]
• When 0 is written in TDRE after reading TDRE = 1
• When data is written in
ICDRT
783 Table amended
Bit Bit Name Initial Value R/W Description
2 AL 0 R/W Arbitration Lost Flag
This flag indicates that arbitration was lost in master
mode.
When two or more master devices attempt to seize
the bus at nearly the same time, if the I
2
C bus
interface detects data differing from the data it sent, it
sets AL to 1 to indicate that the bus has been taken
by another master.
[Setting conditions]
• If the internal SDA and SDA pin disagree at the
rise of SCL in master transmit mode
• When the internal SDA high in master mode while
a start condition is detected
[Clearing condition]
• When 0 is written in AL/OVE after reading
AL/OVE=1
16.4.7 Example of
Use
Figure 16.14 Sample
Flowchart for Master
Transmit Mode
797 Figure amended
BBSY=0 ?
No
Yes
Start
[1]
[2]
[3]
Initialize
Set MST = 1 and TRS
= 1 in ICCRA.
Write BBSY = 1
and SCP = 0.
Read BBSY in ICCRB
[1] Test the status of the SCL and SDA lines.*
[2] Select master transmit mode.*
[3] Start condition issuance.*
[4] Select transmit data for the first byte (slave address + R/W),
and clear TDRE to 0.
Note: * Ensure that no interrupts occur between when BBSY
is cleared to 0 and start condition [3].