Datasheet

Section 5 Interrupt Controller
Rev.7.00 Mar. 18, 2009 page 108 of 1136
REJ09B0109-0700
Bit Bit Name Initial Value R/W Description
3 — 0 — Reserved
This bit is always read as 0 and the initial value should
not be changed.
2
1
0
IPR2
IPR1
IPR0
1
1
1
R/W
R/W
R/W
Sets the priority of the corresponding interrupt source.
000: Priority level 0 (Lowest)
001: Priority level 1
010: Priority level 2
011: Priority level 3
100: Priority level 4
101: Priority level 5
110: Priority level 6
111: Priority level 7 (Highest)
5.3.3 IRQ Enable Register (IER)
IER controls enabling and disabling of interrupt requests IRQ15 to IRQ0.
Bit Bit Name Initial Value R/W Description
15 IRQ15E 0 R/W IRQ15 Enable
The IRQ15 interrupt request is enabled when this
bit is 1.
14 IRQ14E 0 R/W IRQ14 Enable
The IRQ14 interrupt request is enabled when this
bit is 1.
13 IRQ13E 0 R/W IRQ13 Enable
The IRQ13 interrupt request is enabled when this
bit is 1.
12 IRQ12E 0 R/W IRQ12 Enable
The IRQ12 interrupt request is enabled when this
bit is 1.
11 IRQ11E 0 R/W IRQ11 Enable
The IRQ11 interrupt request is enabled when this
bit is 1.